Versions Compared

Key

  • This line was added.
  • This line was removed.
  • Formatting was changed.

...

GCC has no options to handle shifts by negative amounts or by amounts outside the width of the type predictably or to trap on them; they are always treated as undefined. Processors may reduce the shift amount modulo the width of the type. For example, 32-bit right shifts are implemented using the following instructions on x86-32:

Code Block
sa[rl]lsarl   %cl, %eax

The sa[rl]l sarl instructions take a bit mask of the least significant 5 bits from %cl to produce a value in the range [0, 31] and then shift %eax that many bits:

Code Block
// 64-bit right shifts on IA-32 platforms become
sh[rl]dlshrdl  %eax, %edx
sa[rl]lsarl   %cl, %eax

where %eax stores the least significant bits in the doubleword to be shifted, and %edx stores the most significant bits.

...

...