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| Code Block |
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Thread 1: register 0 = flags Thread 1: register 0 &= ~mask(flag1) Thread 2: register 0 = flags Thread 2: register 0 &= ~mask(flag2) Thread 1: register 0 |= 1 << shift(flag1) Thread 1: flags = register 0 Thread 2: register 0 |= 2 << shift(flag2) Thread 2: flags = register 0 |
Compliant Solution (bit-field, C++11 and
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later,
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mutex)
This compliant solution protects all accesses of the flags with a mutex, thereby preventing any data races.
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Although the race window is narrow, an assignment or an expression can evaluate improperly because of misinterpreted data resulting in a corrupted running state or unintended information disclosure.
Rule | Severity | Likelihood | Remediation Cost | Priority | Level |
|---|---|---|---|---|---|
CON52-CPP | Medium | Probable | Medium | P8 | L2 |
Automated Detection
| Tool | Version | Checker | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
| Astrée |
| read_write_data_race write_write_data_race | Supported | ||||||
| Axivion Bauhaus Suite |
| CertC++-CON52 | |||||||
| CodeSonar |
| CONCURRENCY.DATARACE | Data Race | ||||||
| Coverity | 6.5 | RACE_CONDITION | Fully implemented | ||||||
| Helix QAC |
| C++1774, C++1775 | |||||||
| Parasoft C/C++test |
| CERT_CPP-CON52-a | Use locks to prevent race conditions when modifying bit fields | ||||||
| Polyspace Bug Finder |
| CERT C++: CON52-CPP | Checks for data races (rule partially covered) |
Related Vulnerabilities
Search for vulnerabilities resulting from the violation of this rule on the CERT website.
Related Guidelines
| SEI CERT C Coding Standard | CON32-C. Prevent data races when accessing bit-fields from multiple threads |
Bibliography
| [ISO/IEC 14882-2014] | Subclause 1.7, "The C++ memory model" |
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